Hamed Tabkhi, Ph.D.

Dr. Hamed Tabkhi, PH.D.

Associate Professor
Electrical and Computer Engineering
  • Ph.D. Northeastern University, Boston, USA, 2014
  • M.S. Sharif University of Technology, Tehran, Iran, 2008
  • B.S. Sharif University of Technology
  • Real-time embedded vision
  • Domain-Specific Computing (DSC)
  • Mobile-Edge Computing (MEC)
  • Cyber-Physical Systems (CPS)
  • Novel architecture for emerging deep learning and machine learning algorithms
Selected Publications:
  1. A. Momeni, H. Tabkhi, G. Schirner and D. Kaeli, ” Hardware thread reordering to boost OpenCL throughput on FPGAs”, International Conference on Computer Design (ICCD), Phoenix (AZ), Oct. 2016.
  2. N. Teimouri, H. Tabkhi and G. Schirner, “Improving Scalability of CMPs with Dense ACCs Coverage”, IEEE Design Automation and Test in Europe (DATE), Dresden, Germany, Mar. 2016.
  3. H. Tabkhi, R. Bushey and G. Schirner, “Conceptual Abstraction Levels (CALs) for Managing Design Complexity of Market-Oriented MPSoCs”, Elsevier Journal of Microprocessors and Microsystems, vol.39, no.8, pp. 704-719, Nov. 2015.
  4. H. Tabkhi, R. Bushey and G. Schirner, “Function-Level Processor (FLP): A High Performance, Minimal Bandwidth, Low Power Architecture for Market-Oriented MPSoCs”, IEEE Embedded Systems Letters, vol.6, no.4, pp.65-68, Dec. 2014.
  5. H. Tabkhi and G. Schirner, “Application-Guided Power Gating Reducing Register File Static Power”, IEEE Transactions on Very Large Scale Integration (TVLSI), vol.22, no.12, pp.2513-2526, Dec. 2014.
  6. H. Tabkhi, R. Bushey and G. Schirner, “Function-Level Processor (FLP): Raising Efficiency by Operating at Function Granularity for Market-Oriented MPSoCs”, IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), Zurich, Switzerland, Jun. 2014.
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